4-112
R3206
100K
RSSI
R3207
39K
Y3200
XTAL
C3200
16pF
IF_1_ZIF
6
OUT 3
IN
IF
L3200
C3201
1uH
1.5pF
RSSI
R3213
RSSI_1_ZIF
RSSI_2_ZIF
2.2K
RSSI
if
if
C3209
1uF
(SOURCE)
Vdd_FILTERED
Q3202
5V
VSF_3_ZIF
VSF
if
R3225
1K
C3214
0.1uF
5V
R3217
5V_3_ZIF
NU
5V
if
R3214
100
SWB_PLUS_3_ZIF
SWB+
1
VIN
if
3
ON_OFF*
R3215
100
C3215
C3212
10pF
1uF
Figura 4-66. Diagrama esquemático de la etapa de salida del receptor de VHF (136-174 MHz) (tarjeta de circuito impreso nº 8480675Z04)
C3208
R3209
0.1uF
1K
R3200
150
Q3201
C3204
R3201
.01uF
2.2K
R3212
R3208
4.7K
100
C3210
1000pF
R3202
4.7K
R3210
2.2K
C3203
100pF
MMBR941
Q3200
C3202
R3203
L3201
R3211
1uH
12pF
10K
2.2K
R3204
22
C3206
R3205
.01uF
1K
Vdd_FILTERED
R3226
10
C3270
.022uF
C3271
3
330pF
Q3270
BFQ67W
2
C3273
10pF
R3218
C3272
NU
R3270
4.7pF
1K
C3211
4.7uF
10
U3201
LP2980
Vdda_3_ZIF
5
VOUT
Vdda
4
NC
if
C3213
2
4.7uF
R5
if
R5_3_ZIF
C3205
0.1uF
R3221
100
L3202
1uH
C3218
C3221
4.7uF
.01uF
C3230
100pF
C3243
C3207
.022uF
2.2pF
R3222
100K
R3219
100
5V
Vdd_FILTERED
C3219
0.1uF
R3272
47K
C3277
C3276
L3271
47pF
82pF
2.2uH
1
R3273
C3274
L3270
R3276
47K
100nH
33pF
D3270
200K
R3271
47
C3275
56pF
SH3201
SHIELD
1
Vdd_FILTERED
Vdd_FILTERED
R3220
4.7K
C3220
10pF
L3221
1uH
C3228
.01uF
C3239
C3229
.022uF
100pF
C3225
0.1uF
C3226
0.1uF
C3238
0.15uF
C3233
C3234
1uF
1uF
36
C4M
1
35
C3M
RED_VCC
2
34
C2M
RED_VSS
3
33
C3235
PRE_IN
C1M
4
32
0.22uF
5 RSSI_OUT
VAG
31
32D83
LIM
RSSI_FLT
C3244
6
30
U3220
ROSE_VCC
EXTBS
.01uF
mgc_comps
7
29
AFC
ROSE_VSS
8
28
DEMOD_HF
TESTD
9
27
VPP
DEMOD_OUT
10
26
GOLD_VCC
PHASE_LOCK
R3223
11
25
1K
VAG_REF
EMIT
12
BASE
R3224
10
C3240
0.22uF
C3242
C3222
0.1uF
0.1uF
C3227
.01uF
C3223
0.1uF
C3241
1200pF
DATA_3_ZIF
if
R3275
CLK_3_ZIF
3.9K
if
LVZIF_SEL_1_ZIF
R3274
C3280
1K
if
8200pF
C3278
0.1uF
16_8MHz_3_ZIF
if
C3279
1uF
ZMY0130407-A
C3232
C3231
1uF
1uF
C3224
Vdd_FILTERED
0.1uF
SQ_OUT_1_ZIF
C3237
if
SQ_OUT
100pF
DEMOD_1_ZIF
if
DEMOD
C3236
.01uF
NU
Vdd_FILTERED
SH3202
SHIELD
1
SH3203
SHIELD
NU