Samsung LE26S8 Instrucciones Del Propietario página 291

Diagrammi a blocchi
Input Jack
PCMCIA
ANT
TS
DVB NIM SIF
Tuner
CVBS
HDMI 1,2
HDMI S/W
Sil9185CTU
DVI Audio
SC1:RGB
EXT 1/2
SC1:CVBS,FB
SC2:CVBS
PC
R,G,B,Hsync,Vsync
Y,Pb,Pr
COMPONENT
VIDEO
CVBS
S- VIDEO
Y,C
DDR
32MB
TS S/W
LCX16244
FLASH
4MB
Xtal
27MHz
I2C
BA7657F
Caption/TTX2.5
MMS Option
BA7657F
V I D E O
STi5105
CPUI
DEMUX
MPEG A/V-
DECODER
PAL ENCODER
HOST-
INTERFACE
PERIPHERALS
SPDIF
Rx,Tx
SVP- UX68
(336-FPGA)
DDR
4M x 32
ME/MC
3D Comb
[DDR_MCLK0#, DDR_MCLK0]
Max. 250Mhz
Multi Decoder
De-interlacer
Scaler
LVDS Out
Sub-
UXGA Output
Micom
(or 100Hz)
I2C
DNIe (Demo)
LVDS
HDMI
HDMI Sound I2S DM74LS157M
Audio
Processor
I2C
SGTV5810
I2S
A U D I O B
Italiano - 
FILTER
Y,Pb,Pr,CVBS
AUDIO DAC
CS4340
DTV R/L
74HC4052
MUX
UART
SP232ACN
I2C
Micom
M30840
Inverter on/off
UART
PWM/Ana
dimming
I2C
LVDS
FBE2
I2C
AMP
NTP3000
I2S
U S 2 I C
DTV Part
MAIN Part
PDP Logic (LVDS)
Hotel Server
Main/DTV/Logic
Service Jack
Display Panel
1366 x 768
(1024 x 768)
Monitor out
SPDIF out
Head phone
L
Speaker
R
N O R M A L I S G N A L