Crc - Balluff BML Información Básica

Interfaces para el encóder magnético
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Interfaces for BML Magnetic Encoder System
2
Interfaces (continued)
By transmitting one bit per frame, various addresses in
the sensor can be read and written using several
frames. Further information on errors or warnings are
also available there. Customer data can also be saved
and read (see Fig. 2-6).
2.3.1

CRC

To ensure the integrity of the data, a cyclic redundancy
check (abbreviated CRC) is used in the controller. Here, a
check value is calculated for the transmitted data in both
the sensor and controller and then compared. If both
values are identical, the data has been transmitted
correctly. If they are different, the data has been
transmitted incorrectly and the position value must be
requested again.
The controller is parameterized as follows:
CRC: 6 bits (transferred inverted)
The counter polynomial for CRC determination is
0x43 (hex), 67 (dec) or 1000011 (bin).
Uni-directional BiSS C
Only the data is transmitted from the measuring system to
the controller. No additional information can be or is
transmitted (such as register communication with BiSS C).
Uni-directional signal position/logics for BiSS C:
The time sequence of the individual bits is shown in
Fig. 2-7.
CDS/CDM is always high, then come bits 1 to n. Then an
error and a warning bit are transmitted. The error and
warning bit in the data set is active low. If no error or
warning is present, both bits are high.
The meaning/value of the bits is shown in
Tab. 2-2 on page 7.
Trigger time
Clk
Data
ACK
... Busy . ..
Fig. 2-7:
BiSS C interface signals (uni-directional)
10
english
Start
CDS
Bit 39
Bit 38
Bit 37
Bit 36
Bi-directional BiSS C
With the BiSS C interface, as with the SSI interface, errors
and warnings (EW events) are transferred in the serial data
set. Additionally, the type of event can also be queried via
register communication.
The error and warning bits are, as with uni-directional
interfaces, transferred in the serial data stream after the
position data and before the CRC. In Fig. 2-6 the timing is
shown. The error and warning bit in the data set is
transferred as active low. If no error or warning is present,
both bits are high.
Error byte, warning byte:
Using the register data, the controller can read the exact
error or warning causes. The error byte is located at the
BiSS register address 0x48 and the warning byte at BiSS
register address 0x49. There, different error and warning
causes are coded bit by bit.
The meaning of the error and warning bits is
described in the user's guide for the sensor.
CRC
Bit 35
...
Bit 0
E
W
MSB
CDM
t m
t
CRC
LSB
t
t
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