• DESCRIPCIÓN DE PIN
Name
Pin NO.
PLL_AVDD
PLL_AVSS
PLL_DVDD
PLL_DVSS
DVDD
13, 34, 42,
66, 80, 91
DVSS
14, 35, 43,
63, 81, 92
IO_VDD
4, 10, 22, 29, 39,
47, 56, 65, 72, 94
IO_VSS
1, 5, 7, 9, 21,
28, 38, 44, 50,
53, 57, 60, 64,
69, 73, 85, 95
/RESET
XIN
XOUT
MBCK
MLRCK
MSDIN [3:0]
15, 16, 17, 18
SBCK
SLRCK
SSDIN [3:0]
23, 24, 25, 26
Type
Power and Ground
6
Analog
PLL analog power supply.
Power
8
Analog
PLL analog ground.
Ground
3
PLL
PLL digital power supply.
Power
2
PLL
PLL digital ground.
Ground
Power
Core power supply.
Ground
Core digital ground.
Power
I/O power supply. 3.3V Digital power supply.
Ground
I/O digital ground.
Reset and Clock
96
I
H/W reset signal. Active Low Schmitt-Trigger input.
The Schmitt-Trigger input allows a slowly rising input to reset the
chip reliably. The RESET signal must be asserted 'Low' during
power up. De-assert 'High' for normal operation.
86
Analog
Crystal Oscillator input pin.
87
Analog
Crystal Oscillator output pin.
PCM Audio Input/Output Interface
11
I/O
PCM bit clock input/output of main 8-channel audio.
User can select the master/slave mode of this signal.
Schmitt-Trigger input.
12
I/O
PCM Word clock (left-right clock) input/output of main 8-channel
audio. User can select the master/slave mode of this signal.
Schmitt-Trigger input.
I
PCM serial data input of main 8-channel audio.
Schmitt-Trigger input.
19
I/O
PCM bit clock input/output of 8-channel audio.
User can select the master/slave mode of this signal.
Schmitt-Trigger input.
20
I/O
PCM word clock (left-right clock) input/output of sub 8-channel
audio. User can select the master/slave mode of this signal.
Schmitt-Trigger input.
I/O
PCM serial data input of sub-channel audio.
User can set this sub-channel data input pins to PCM serial data
output pins. See the Control Register Description part.
Schmitt-Trigger input
3-32
Description