5.1.2 AC2005 POST Code Definitions
POST
(hex)
8.1.
8.2.
8.3.
8.4.
8.5.
8.6.
8.7.
8.8.
8.9.
8.A.
8.B.
8.C.
8.D.
8.D.
8.E.
8.F.
9.0.
9.1.
9.2.
9.3.
9.4.
9.5.
9.6.
9.7.
9.8.
9.9.
C.C.
F.0.
F.1.
F.2.
F.3.
5-4
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Description
Power On Sequence
Start power on sequence
Enable ATX power supply
ATX power supply ready
DDR voltage ready
Setup PWM for CPU core voltage
Assert PWM for CPU core voltage
Check CPU core voltage
CPU core voltage ready
Initial clock generator IC
North Bridge chipset voltage ready
AGP voltage ready
3VDUAL voltage ready
VDDA 2.5V voltage ready
GMCHVTT voltage ready
Check CPU fan speed
Assert all power ready
Complete µGuru initial process
AWARDBIOS take over booting job
Power Off Sequence
Start power off sequence
De-Assert all power
De-Assert power on
De-Assert LDT Bus power
De-Assert PWM for CPU core voltage
De-Assert CPU core voltage
Check CPU core voltage
De-Assert ATX power supply
Complete power off sequence
Either the external "EZ-CCMOS1" switch or the internal "CCMOS1" jumper is not
set to its normal position.
Button reset
SoftMenu reset
Power on sequence timeout
Power off sequence timeout
Others
IX38 QuadGT
