1
6
1
J501
J502
Figura 1-1 Disposición del Tablero de Control PCB100
1-4
6
1
6
1
6
1
J503
J504
J505
JP2
PCB 100
FAILCLOSE
JP5
DAYINHIBIT
JP6
DUAL
JP7
JP8
CAT
JP9
50HZ
Revisión 2 — 02-23-2001
2
1
6
1
2
J506
J507
RES
PEC
I 1
SYNC
CLEAR
TIERS
1
7
RS-232
J7
BEACON 1
1
4
ON
S1
OFF
BEACON 2
S2
ON
OFF
BEACON 3
ON
S3
OFF
BEACON 4
ON
S4
OFF
DISPLAY
FTC 183-1W/FTC 183-1R
183-01