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USER'S MANUAL. GR-205
Bit 2 -
Query Error. Set when a query error occurs. The appropriate error
number will be reported in the Query Error Register as listed below.
1. Interrupted error
2. Deadlock error
3. Unterminated error
Bit 1 -
Not used.
Bit 0 -
Operation Complete. Set in response to the *OPC command.
System Event Status Register and System Event Status Enable
5.5.2
Registers
These two registers are implemented as specific device registers, event
registers and event activation registers conforming to the IEEE 488.2 norm.
purpose is to report to the controller when the reactive power protection system is
functioning or has functioned since the last reading of the System Event Status
Register.
If the reactive power protection system is functioning, the specified bit will be
adjusted in the System Event Status Register. If the corresponding bit is also adjusted
in the System Event Status Enable Register, then the SYS bit will be adjusted in the
Status Byte Register.
The System Event Status Register is read and cleared using the command
SSR? and the System Event Status Enable Register is adjusted using the command
SSE <nrf>.
The bits are defined in the following way:
Bit 7 – Bit 1 - Not used
Bit 0
- It is adjusted when the reactive power protection system
functions.
5.5.3 Status Byte Register and Service Request Enable Register
These two registers are implemented as required by the IEEE std. 488.2. Any
bits set in the Status Byte Register which correspond to bits set in the Service Request
Enable Register will cause the RQS/MSS bit to be set in the Status Byte Register, thus
generating a Service Request on the bus.
The Status Byte Register is read either by the *STB? command, which will
return MSS in bit 6, or by a Serial Poll which will return RQS in bit 6. The Service
Request Enable register is set by the *SRE <nrf> command and read by the *SRE?
command.
09/2004
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