• IC5 CXD9684R-005 (DSP) (SERVO Board)
Pin No.
Pin Name
1
/RESET
2
MIMD
3, 4
AD0, AD1
5
MIDIO(I2C_SDA)
6
MICK(I2C_SCL)
7
AD2
8
VDDT(3.3V)
9
SDO
10, 11
AD3, AD4
12
SDI0
13
BCKIA
14
LRCKIA
15
AD5
16
CE
17
OE
18
VDD(2.5V)
19
STANDBY
20
VSS(2.5VGND)
21
VSSL(2.5VGND)
22
VRAL
23
LO
24
VDAL(2.5V)
25
VDAR(2.5V)
26
RO
27
VRAR
28
VSSR(2.5VGND)
29
TESTP
30
CKS
31 to 34
AD12 to AD9
35
VDDT(3.3V)
36 to 38
AD8 to AD6
39
REQ
40
VSS
41, 42
AD13,AD14
43
WR
44, 45
AD16,AD15
46, 47
IO0,IO1
48
VSS
49 to 51
IO2 to IO4
52
VDD(2.5V)
53 to 55
IO5 to IO7
56
VSSP
57
PDO
58
VCOI
59
VDDP
60
XRDE
61
VDDX(2.5V)
62
XI
63
XO
64
VSSX
I/O
I
Reset input terminal "L": reset
I
Microcomputer interface mode selection input "H": I2C, "L": TSB
O
External SRAM address signal output
I/O
Serial data input/output
I
Serial clock input
O
External SRAM address signal output
—
Power supply (3.3V) for digital circuit
O
Data output
O
External SRAM address signal output
I
Data input 0
I
Bit clock input A
I
LR clock input A
O
External SRAM address signal output
O
External SRAM chip enable signal output
O
External SRAM output enable signal output
—
Power supply (2.5V) for digital circuit
I
Standby mode control signal input "H": STB, "L": normal
—
Ground for digital circuit
—
Ground for DAC Lch
—
Reference voltage terminal for DAC Lch
O
DAC Lch signal output (open)
—
Power supply (2.5V) for DAC Lch
—
Power supply (2.5V) for DAC Rch
O
DAC Rch signal output (open)
—
Reference voltage terminal for DAC Rch
—
Ground for DAC Rch
I
Terminal for test "H": test mode, "L": normal (fixed at "L")
I
VCO selection input "H": VCO, "L": X1 input
O
External SRAM address signal output
—
Power supply (3.3V) for digital circuit
O
External SRAM address signal output
O
Interrupt request signal output to the CD master control (IC3)
—
Ground for digital circuit
O
External SRAM address signal output
O
External SRAM write signal output
O
External SRAM address signal output
I/O
External SRAM data input/output
—
Ground for digital circuit
I/O
External SRAM data input/output
—
Power supply (2.5V) for digital circuit
I/O
External SRAM data input/output
—
Ground for VCO circuit
O
PLL phase error detection signal output
I
VCO control voltage input
—
Power supply for VCO circuit
I/O
External clock input, audio clock output (not used)
—
Power supply for oscillation circuit
I
Resonator terminal
O
Resonator terminal
—
Ground for oscillation circuit
Description
CDX-MP30
31